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<\/p>\nThe new high efficiency video coding (HEVC) standard\u00a0has recently been established by the joint collaborative team on video coding (JCT-VC), an expert group\u00a0proposed by the ISO\/IEC moving expert group (MPEG) and the ITU-T video coding\u00a0expert group (VCEG). HEVC was initially conceived with the purpose of achieving\u00a0adequate efficiency and performance to deliver high-quality multimedia services over\u00a0bandwidth-constrained networks, and also to support formats beyond high definition\u00a0(HD) resolution, such as the new 4 and 8K formats.<\/p>\n
Most of the improvements imply a considerable increase in the encoding time. Fortunately, this computational cost can be efficiently reduced by adapting the sequential\u00a0algorithm to parallel architectures. Over the past few years the computing industry\u00a0has tended towards including several processing units on a single shared chip. In fact,in terms of massive data computing, there are devices called graphic processing units(GPUs) which are normally used as co-processors to assist the central processing unit\u00a0(CPU). CPUs and GPUs have different instruction set architectures, forming what it\u00a0is known as a heterogeneous computing platform.<\/p>\n
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The\u00a0complexity of the inter prediction module can be justified by the motion estimation (ME) algorithm, which conducts large amount of repetitive operations\u00a0that the encoder has to perform on the same picture samples but with different\u00a0block partitions, i.e. different prediction units (PU) for the same coding tree\u00a0unit (CTU). While this distribution of time applies to most configurations, the\u00a0All Intra configuration dispenses with the temporal prediction and opts for the\u00a0spatial prediction instead. As a result, the intra prediction module can exceed\u00a090% of the total encoding time, given the considerable number of modes it has\u00a0to test for every PU, namely 33 directional modes, and the DC and planar\u00a0modes. For this reason, it has to be noted that both prediction modules are\u00a0equally important depending on the coding configuration used.<\/p>\n
The RAAP group has been carrying research in video coding\u00a0for more than 15 years<\/strong>, achieving significant insights which have been published in relevant conferences and journals, and\u00a0incorporated\u00a0to commercial products as well.<\/p>\n Design of HEVC Parallelization algorithms for GPUs and\/or Multicore devices.<\/p>\n<\/li>\n Speed-up HEVC Intra\/Inter encoders by using heuristic techniques and\/or soft computing algorithms<\/p>\n<\/li>\n<\/ul>\n<\/div>\n Relevant Publications:<\/span><\/p>\n Relevant Projects:<\/p>\n People:<\/span><\/p>\n\nTopics:<\/span><\/div>\n<\/div>\n\n
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\nSynchronous and asynchronous HEVC parallel encoder versions based on a GOP approach<\/strong>.<\/strong>
\nAdvances in Engineering Software, ISSN: 0965-9978, February 2016<\/li>\n
\nAccelerating HEVC Using Heterogeneous Platforms.<\/strong>
\nThe Journal of Supercomputing, ISSN: 0920-8542, Vol. 71(2), pp- 613-628, February, 2015<\/li>\n
\nFast CU partitioning algorithm for HEVC intra coding using Data Mining.<\/strong>
\nMultimedia Tools and Application<\/strong>, ISSN: 1573-7721, ONLINE (doi: 10.1007\/s11042-015-3014-6), November 2015<\/li>\n
\nFast intra mode decision algorithm based on texture orientation detection in HEVC.<\/strong>
\nSignal Processing: Image Communication, ISSN: 0923-5965, Vol. 44(2016), pp. 12-28, May, 2016<\/li>\n<\/ul>\n\n
\n<\/a><\/strong>We develop research on chip-multicore architecture and on-chip networks, aiming at increasing performance, reducing power consumption, increasing reliability by means of providing fault-tolerance support, increasing flexibility through virtualization techniques, and reducing silicon area.<\/li>\n<\/ul>\n
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<\/a>\u00a0![\"dblp.icon.18x18\"](\"http:\/\/www.i3a.uclm.es\/raap\/wp-content\/uploads\/2016\/05\/dblp.icon_.18x18.png\"){kind=icon}
<\/a><\/span><\/td>\n<\/tr>\n![\"Pepelu\"](\"http:\/\/www.i3a.uclm.es\/raap\/wp-content\/uploads\/2016\/05\/Pepelu.jpg\")
<\/td>\n![\"Gerardo\"](\"http:\/\/www.i3a.uclm.es\/raap\/wp-content\/uploads\/2016\/04\/GFE-photo-web-150x100.jpg\")
<\/td>\n![\"images\"](\"http:\/\/www.i3a.uclm.es\/raap\/wp-content\/uploads\/2016\/04\/images.jpeg\")
<\/td>\n![\"gabriel\"](\"http:\/\/www.i3a.uclm.es\/raap\/wp-content\/uploads\/2016\/04\/gabriel.jpg\")
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